Paper describes work in massively parallel, interconnected system – with limits to data in on-chip memory
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The latest brain-inspired silicon is made up of 256 cores, with each core a vector matrix multiplication engine capable of 2,048 operations per cycle at 8-bit precision. These share 192MB of memory, plus 32MB framebuffer for IO tensors. It is claimed to be roughly 4,000 times faster than TrueNorth. However, as IBM concedes, NorthPole is limited by the amount of data it can fit into that on-chip memory space. The workaround to enable NorthPole to support larger neural networks is by breaking them down into smaller sub-networks that will fit, and connecting these sub-networks together across multiple NorthPole chips.
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